| Titanium Data Sheets and Overview |
| Titanium Overview | v3.4 |
| Titanium Selector Guide | v3.4 |
| Topaz User Guides |
| Topaz DDR DRAM Block User Guide | v1.3 |
| Titanium User Guides |
| Titanium DDR DRAM Block User Guide | v3.0 |
| Efinity Software |
| Efinity Software User Guide | v18.1 |
| Efinity RISC-V Embedded Software IDE User Guide | v1.1 |
| Efinity Synthesis User Guide | v4.6 |
| Efinity IP Packager User Guide | v1.3 |
| Efinity Timing Closure User Guide | v7.5 |
| Efinity Python API | v8.7 |
| Efinity Programmer User Guide | v4.3 |
| Efinity Command-Line Interface User Guide | v1.1 |
| Quantum Titanium Primitives User Guide | v4.1 |
| Quantum Topaz Primitives User Guide | v3.6 |
| Quantum Trion Primitives User Guide | v6.3 |
| Titanium Interfaces User Guide | v6.8 |
| Trion Interfaces User Guide | v9.1 |
| Topaz Interfaces User Guide | v2.8 |
| Titanium Ti375 N1156 Development Kit |
| Titanium Ti375 N1156 Development Board Schematics and BOM | v1.1 |
| RISC-V SoCs |
| Sapphire RV64 SoC Data Sheet | v1.0 |
| High-Performance Sapphire RV32 SoC Data Sheet | v3.2 |
| Sapphire RV32 SoC Data Sheet | v6.1 |
| Sapphire RV64 SoC User Guide | v1.0 |
| High-Performance Sapphire RV32 SoC User Guide | v3.1 |
| Sapphire RV32 SoC User Guide | v8.1 |
| Application Notes |
| AN 063: High-Speed Transceiver Design Guidelines | v1.3 |
| AXI Infrastructures IP Core User Guides |
| AXI Interconnect Core User Guide | v1.8 |
| Bridges and Adaptors IP Core User Guides |
| PMA 64B66B Gearbox Core User Guide | v1.0 |
| Ethernet IP Core User Guides |
| Triple Speed Ethernet MAC Core User Guide | v6.3 |
| Foundation IP Core User Guides |
| PRBS Core User Guide | v1.0 |
| Memory IP Core User Guides |
| Block RAM Wrapper Core User Guide | v1.9 |
| Memory Controllers IP Core User Guides |
| HyperRAM Controller Core User Guide | v4.2 |
| Serial Interface Protocols IP Core User Guides |
| JTAG Core User Guide | v1.1 |
| UART Core User Guide | v4.0 |
